A case is assumed that impedance when viewing a side of a load from a transistor output terminal is short-circuited for even-order harmonics and opened for odd-order harmonics. In such a case, an output in the even-order harmonics includes only a current component while an output in the odd-order harmonics includes only a voltage component. That is, there is no power consumption in a harmonics circuit. Moreover, if setting a power factor in a fundamental wave to be −1, 100% power efficiency can be achieved. An amplifier circuit adopting this principle is known as a Class-F amplifier circuit.
On the contrary, a case is assumed that the impedance when viewing the load side from the transistor output terminal is opened for the even-order harmonics and short-circuited for the odd-order harmonics. In such a case, the output in the even-order harmonics includes only the voltage component while the output in the odd-order harmonics includes only a current component. That is, there is no power consumption in the harmonics. Moreover, if setting a power factor in the fundamental wave to be −1, 100% power efficiency can be achieved. An amplifier circuit adopting this principle is known as an inverse Class-F amplifier circuit.
FIG. 1 is a circuit diagram showing a configuration of a conventional amplifier circuit. This circuit includes an equivalent circuit of a transistor 1, a matching circuit 19, and a load resistor 18. The equivalent circuit of the transistor 1 includes an equivalent output current source 7, a drain-to-source capacitor 8, and a drain inductor 9.
Here, the drain-to-source capacitor 8 and the drain inductor 9 in the transistor 1 are a parasitic capacitor and a parasitic inductor, respectively. In a case where the parasitic capacitor and the parasitic inductor in the transistor 1 are not considered, for example, as shown in Patent Literatures 1, 2, and 3, the Class-F and inverse Class-F amplifier circuits can be achieved over any orders up to an infinite order.
However, in an actual transistor, there are parasitic elements such as the drain-to-source capacitor and the drain inductor. Especially, in a high-frequency region such as a microwave frequency range and a millimeter wave frequency range, influence of these parasitic elements cannot be ignored, and the efficiency is not improved even if the order of harmonics to be processed is increased in a load circuit.
For this reason, a Class-F amplifier circuit and an inverse Class-F amplifier circuit have been studied in which the parasitic capacitor and the parasitic inductor in a transistor are considered. In Non-Patent Literature 1, a technique is disclosed in which a load conditions in the Class-F amplifier circuit and the inverse Class-F amplifier circuit are achieved up to the third harmonic wave in consideration of the parasitic capacitor and the parasitic inductor in the transistor.
However, no circuit is known which processes the fourth and the higher order harmonics. Accordingly, in an actual design, a trial design is made under the assumption that there is no parasitic element in a semiconductor element, and then it is necessary to perform experimental readjustment. In this case, it is very difficult to make the adjustment simultaneously in consideration of termination conditions of a large number of harmonics. Even if power efficiency of 100% can be achieved through adoption of the Class-F and inverse Class-F amplifier circuits in principle, the power efficiency in a microwave band has remained at approximately 80%.